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Table 2-9. ALU Instruction Summary (Cont'd)
Instruction
Dreg = MAX ( Dreg, Dreg )
(V) ;
Dreg = MIN ( Dreg, Dreg )
(V) ;
Dreg = ABS Dreg (V) ;
An = ABS An ;
An = ABS An,
An = ABS An ;
An = –An ;
An = –An, An =– An ;
An = An (S) ;
An = An (S), An = An (S) ;
Dreg_lo_hi = Dreg (RND) ;
Dreg_lo_hi = Dreg + Dreg
(RND12) ;
Dreg_lo_hi = Dreg – Dreg
(RND12) ;
Dreg_lo_hi = Dreg + Dreg
(RND20) ;
Dreg_lo_hi = Dreg – Dreg
(RND20) ;
Dreg_lo = SIGNBITS Dreg ; –
Dreg_lo = SIGNBITS
Dreg_lo_hi ;
Dreg_lo = SIGNBITS An ;
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
ASTAT Status Flags
AZ
AN
AC0
AC0_COPY
AC1
*
*
–
*
*
–
*
**
–
*
**
–
*
**
–
*
*
*
*
*
*
*
*
–
*
*
–
*
*
–
*
*
–
*
*
–
*
*
–
*
*
–
–
–
–
–
–
–
–
–
Computational Units
AV0
AV1
V
AV0S
AV1S
V_COPY
VS
–
–
**/–
–
–
**/–
–
–
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
–
*
*
–
–
–
*
–
–
*
–
–
*
–
–
*
–
–
*
–
–
–
–
–
–
–
–
–
AQ
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
2-33
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