System Synchronize - Analog Devices ADSP-BF53x Blackfin Reference

Instruction Overview

System Synchronize

General Form
SSYNC
Syntax
SSYNC ; /* (a) */
Instruction Length
In the syntax, comment (a) identifies 16-bit instruction length.
Functional Description
The System Synchronize (
sient states in the core and system to complete before processing
continues. Until
the pipeline.
The instruction performs the same function as Core Synchronize
SSYNC
( ). In addition,
CSYNC
memory and the system interface) and generates a Synch request signal to
the external system. The operation requires an acknowledgement
signal by the system before completing the instruction.
Synch_Ack
If the
idle_req
the processor enters Idle state and asserts the external Idle signal after
receiving the external
asserted, exiting the Idle state requires an external Wakeup signal.
should be issued immediately before and after writing to a system
SSYNC
MMR. Otherwise, the MMR change can take effect at an indeterminate
time while other instructions are executing, resulting in imprecise
behavior.
16-8 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
) instruction forces all speculative, tran-
SSYNC
completes, no further instructions can be issued to
SSYNC
flushes any write buffers (between the L1
SSYNC
bit of the
SEQSTAT
signal. After the external Idle signal is
Synch_Ack
register is set when is executed,
SSYNC