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Arithmetic Operations Instructions
Table C-17. Arithmetic Operations Instructions (Sheet 30 of 44)
Instruction
and Version
Multiply and Multiply-Accumulate
to Half Register
Dreg_hi = (A1 – = Dreg_lo_hi * Dreg_lo_hi) (IU)
Multiply and Multiply-Accumulate
to Half Register
Dreg_hi = (A1 – = Dreg_lo_hi * Dreg_lo_hi) (T)
Multiply and Multiply-Accumulate
to Half Register
Dreg_hi = (A1 – = Dreg_lo_hi * Dreg_lo_hi) (TFU)
Multiply and Multiply-Accumulate
to Half Register
Dreg_hi = (A1 – = Dreg_lo_hi * Dreg_lo_hi) (S2RND)
Multiply and Multiply-Accumulate
to Half Register
Dreg_hi = (A1 – = Dreg_lo_hi * Dreg_lo_hi) (ISS2)
Multiply and Multiply-Accumulate
to Half Register
Dreg_hi = (A1 – = Dreg_lo_hi * Dreg_lo_hi) (IH)
Multiply and Multiply-Accumulate
to Half Register
Dreg_hi = (A1 – = Dreg_lo_hi * Dreg_lo_hi) (M)
C-84
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Opcode Range
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0xC186 1800—
1 1 0 0 0 0 0 1 1 0 0 0 0 1 1 0
0xC186 D9FF
Dreg
half
0xC046 1800—
1 1 0 0 0 0 0 0 0 1 0 0 0 1 1 0
0xC046 D9FF
Dreg
half
0xC0C6 1800—
1 1 0 0 0 0 0 0 1 1 0 0 0 1 1 0
0xC0C6 D9FF
Dreg
half
0xC026 1800—
1 1 0 0 0 0 0 0 0 0 1 0 0 1 1 0
0xC026 D9FF
Dreg
half
0xC126 1800—
1 1 0 0 0 0 0 1 0 0 1 0 0 1 1 0
0xC126 D9FF
Dreg
half
0xC166 1800—
1 1 0 0 0 0 0 1 0 1 1 0 0 1 1 0
0xC166 D9FF
Dreg
half
0xC016 1800—
1 1 0 0 0 0 0 0 0 0 0 1 0 1 1 0
0xC016 D9FF
Dreg
half
Bin
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
src_reg_
src_reg_
0 Dreg #
1 Dreg #
src_reg_
src_reg_
0 Dreg #
1 Dreg #
src_reg_
src_reg_
0 Dreg #
1 Dreg #
src_reg_
src_reg_
0 Dreg #
1 Dreg #
src_reg_
src_reg_
0 Dreg #
1 Dreg #
src_reg_
src_reg_
0 Dreg #
1 Dreg #
src_reg_
src_reg_
0 Dreg #
1 Dreg #
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