Analog Devices ADSP-BF53x Blackfin Reference page 839

Control Code Bit Management
Instructions
Table C-13. Control Code Bit Management Instructions (Sheet 1 of 4)
Instruction
and Version
Compare Data Register
CC = Dreg == Dreg
Compare Data Register
CC = Dreg == imm3
Compare Data Register
CC = Dreg < Dreg
Compare Data Register
CC = Dreg < imm3
Compare Data Register
CC = Dreg <= Dreg
Compare Data Register
CC = Dreg <= imm3
Compare Data Register
CC = Dreg < Dreg (IU)
Compare Data Register
CC = Dreg < uimm3 (IU)
Compare Data Register
CC = Dreg <= Dreg (IU)
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Opcode Range 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0x0800— 0 0 0 0 1 0 0 0 0 0 Source
0x083F
0x0C00— 0 0 0 0 1 1 0 0 0 0 imm3
0x0C3F
0x0880— 0 0 0 0 1 0 0 0 1 0 Source
0x08BF
0x0C80— 0 0 0 0 1 1 0 0 1 0 imm3
0x0CBF
0x0900— 0 0 0 0 1 0 0 1 0 0 Source
0x093F
0x0D00— 0 0 0 0 1 1 0 1 0 0 imm3
0x0D3F
0x0980— 0 0 0 0 1 0 0 1 1 0 Source
0x09BF
0x0D80— 0 0 0 0 1 1 0 1 1 0 uimm3
0x0DBF
0x0A00— 0 0 0 0 1 0 1 0 0 0 Source
0x0A3F
Instruction Opcodes
Bin
reg #
reg #
reg #
reg #
reg #
Dest reg
#
Dest reg
#
Dest reg
#
Dest reg
#
Dest reg
#
Dest reg
#
Dest reg
#
Dest reg
#
Dest reg
#
C-39