Analog Devices ADSP-BF53x Blackfin Reference page 793

Table B-1. L1 Data Memory Controller Registers (Cont'd)
Memory-mapped
Address
0xFFE0 0224
0xFFE0 0228
0xFFE0 022C
0xFFE0 0230
0xFFE0 0234
0xFFE0 0238
0xFFE0 023C
0xFFE0 0300
0xFFE0 0400
0xFFE0 0404
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Register Name
DCPLB_DATA9
DCPLB_DATA10
DCPLB_DATA11
DCPLB_DATA12
DCPLB_DATA13
DCPLB_DATA14
DCPLB_DATA15
DTEST_COMMAND
DTEST_DATA0
DTEST_DATA1
Core MMR Assignments
See Section
"DCPLB_DATAx Registers" on page 6-57
"DCPLB_DATAx Registers" on page 6-57
"DCPLB_DATAx Registers" on page 6-57
"DCPLB_DATAx Registers" on page 6-57
"DCPLB_DATAx Registers" on page 6-57
"DCPLB_DATAx Registers" on page 6-57
"DCPLB_DATAx Registers" on page 6-57
"DTEST_COMMAND Register" on
page 6-39
"DTEST_DATA0 Register" on page 6-42
"DTEST_DATA1 Register" on page 6-41
B-3