Analog Devices ADSP-BF53x Blackfin Reference page 972

Instructions Listed By Operation Code
Table C-23. 32-Bit Opcode Instructions (Sheet 19 of 40)
Instruction
and Version
Multiply 16-Bit Operands
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (TFU)
Vector Multiply
Dreg_lo = Dreg_lo_hi * Dreg_lo_hi ,
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (TFU)
Multiply 16-Bit Operands
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (TFU, M)
Vector Multiply
Dreg_lo = Dreg_lo_hi * Dreg_lo_hi ,
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (TFU, M)
Multiply 16-Bit Operands
Dreg_lo = Dreg_lo_hi * Dreg_lo_hi (IS)
Multiply 16-Bit Operands
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (IS)
Vector Multiply
Dreg_lo = Dreg_lo_hi * Dreg_lo_hi ,
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (IS)
Multiply 16-Bit Operands
Dreg_even = Dreg_lo_hi * Dreg_lo_hi (IS)
Multiply 16-Bit Operands
Dreg_odd = Dreg_lo_hi * Dreg_lo_hi (IS)
Vector Multiply
Dreg_even = Dreg_lo_hi * Dreg_lo_hi ,
Dreg_odd = Dreg_lo_hi * Dreg_lo_hi (IS)
Multiply 16-Bit Operands
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (IS, M)
Vector Multiply
Dreg_lo = Dreg_lo_hi * Dreg_lo_hi ,
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (IS, M)
Multiply 16-Bit Operands
Dreg_odd = Dreg_lo_hi * Dreg_lo_hi (IS, M)
Vector Multiply
Dreg_even = Dreg_lo_hi * Dreg_lo_hi ,
Dreg_odd = Dreg_lo_hi * Dreg_lo_hi (IS, M)
C-172 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Opcode
Range
0xC2C4 0000—
0xC2C4 C1FF
0xC2C4 2000—
0xC2C4 E7FF
0xC2D4 0000—
0xC2D4 C1FF
0xC2D4 2000—
0xC2D4 E7FF
0xC300 2000—
0xC300 27FF
0xC304 0000—
0xC304 C1FF
0xC304 2000—
0xC304 E7FF
0xC308 2000—
0xC308 27FF
0xC30C 0000—
0xC30C C1FF
0xC30C 2000—
0xC30C E7FF
0xC314 0000—
0xC314 C1FF
0xC314 2000—
0xC314 E7FF
0xC31C 0000—
0xC31C C1FF
0xC31C 2000—
0xC31C E7FF