Analog Devices ADSP-BF53x Blackfin Reference page 1004

Index
accumulators
extension registers A0.x and A1.x,
initializing, 8-4
overflow arithmetic status flags, 1-15,
C-7
result registers A[1: 0], 2-8, 2-36,
saturation quantity, 1-12
sticky overflow arithmetic status flag,
1-15
accumulator to D-register move
instruction, 9-2
option flags, 9-4
accumulator to half D-register move
instruction, 9-19
ACO_COPY bit, 2-25
+ (add) operator, 18-13,
+|+ (vector add / add) operator,
add immediate instruction, 15-16,
add instructions, 15-6,
add, C-55
add immediate, 15-16,
add on sign, 19-3, C-107
add with shift, 14-2,
dual 16-bit add / clip,
quad 8-bit add, C-103
vector add / subtract, 19-18,
add on (SIGN) instruction, 19-3,
address arithmetic unit. See AAU
address calculation (AC),
address collision, SRAM,
addressing
See also auto-decrement; auto-increment;
bit-reversed; circular-buffer; indexed;
indirect; modified; post-increment;
post-modify; pre-modify; DAG (data
address generator)
bit-reversed addresses,
circular buffer, 5-12
indexed, 5-8
modes, 5-18
I-2 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
(continued)
9-15
2-43
19-18
19-18
C-59
C-55
C-59
C-46
C-102
C-107
C-107
4-7
6-27
5-15
addressing
post-modify, 5-11
pre-modify stack pointer,
transfers supported (table),
address-modify operation,
address pointer registers. See pointer
registers (P[5:0])
address-tag compare operation,
+|– (vector add / subtract) operator,
add/subtract - prescale down instruction,
15-10, C-58
add/subtract - prescale up instruction,
15-13, C-59
add with shift instruction, 14-2,
ADSP-BF535 processor
flags, A-2
MMRs, 6-73
special considerations,
ADSP-BF53x processor arithmetic,
ALIGN16 (byte align) instruction,
ALIGN24 (byte align) instruction,
ALIGN8 (byte align) instruction,
alignment
ALIGN16 (byte align) instruction,
ALIGN24 (byte align) instruction,
ALIGN8 (byte align) instruction,
exceptions, 6-71
memory operations,
alignment exceptions
disabling, 5-16
when triggered, 5-10
allocating system stack,
allreg syntax convention,
ALU, video, 2-1
ALU0 carry (AC0) bit,
ALU1 carry (AC1) bit,
ALU (arithmetic logic unit),
arithmetic, 2-14
arithmetic formats, 2-16
data types, 2-14
(continued)
5-11
5-17
5-15
6-13
19-18
C-46
A-1
2-5
18-3
18-3
18-3
18-3
18-3
18-3
6-71
4-56
10-2
2-25
2-25
2-26 to 2-35