Analog Devices ADSP-BF53x Blackfin Reference page 889

Table C-17. Arithmetic Operations Instructions (Sheet 35 of 44)
Instruction
and Version
Multiply and Multiply-Accumulate
to Data Register
Dreg_odd = (A1 = Dreg_lo_hi * Dreg_lo_hi)
Multiply and Multiply-Accumulate
to Data Register
Dreg_odd = (A1 = Dreg_lo_hi * Dreg_lo_hi) (FU)
Multiply and Multiply-Accumulate
to Data Register
Dreg_odd = (A1 = Dreg_lo_hi * Dreg_lo_hi) (IS)
Multiply and Multiply-Accumulate
to Data Register
Dreg_odd = (A1 = Dreg_lo_hi * Dreg_lo_hi) (S2RND)
Multiply and Multiply-Accumulate
to Data Register
Dreg_odd = (A1 = Dreg_lo_hi * Dreg_lo_hi) (ISS2)
Multiply and Multiply-Accumulate
to Data Register
Dreg_odd = (A1 = Dreg_lo_hi * Dreg_lo_hi) (M)
Multiply and Multiply-Accumulate
to Data Register
Dreg_odd = (A1 = Dreg_lo_hi * Dreg_lo_hi) (FU, M)
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Opcode Range 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0xC008 1800— 1 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0
0xC008 D9FF
Dreg
half
0xC088 1800— 1 1 0 0 0 0 0 0 1 0 0 0 1 0 0 0
0xC088 D9FF
Dreg
half
0xC108 1800— 1 1 0 0 0 0 0 1 0 0 0 0 1 0 0 0
0xC108 D9FF
Dreg
half
0xC028 1800— 1 1 0 0 0 0 0 0 0 0 1 0 1 0 0 0
0xC028 D9FF
Dreg
half
0xC128 1800— 1 1 0 0 0 0 0 1 0 0 1 0 1 0 0 0
0xC128 D9FF
Dreg
half
0xC018 1800— 1 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0
0xC018 D9FF
Dreg
half
0xC098 1800— 1 1 0 0 0 0 0 0 1 0 0 1 1 0 0 0
0xC098 D9FF
Dreg
half
Instruction Opcodes
Bin
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
src_reg_ src_reg_
0 Dreg # 1 Dreg #
src_reg_ src_reg_
0 Dreg # 1 Dreg #
src_reg_ src_reg_
0 Dreg # 1 Dreg #
src_reg_ src_reg_
0 Dreg # 1 Dreg #
src_reg_ src_reg_
0 Dreg # 1 Dreg #
src_reg_ src_reg_
0 Dreg # 1 Dreg #
src_reg_ src_reg_
0 Dreg # 1 Dreg #
C-89