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Placing Multiplier Results in Multiplier Accumulator Registers
As shown in
Figure 2-10 on page
accumulator,
A0
tions—
A0.L/A1.L
39:32).
When the multiplier writes to its result Accumulator registers, the 32-bit
result is deposited into the lower bits of the combined Accumulator regis-
ter, and the MSB is sign-extended into the upper eight bits of the register
(
).
A0.X/A1.X
Multiplier output can be deposited not only in the
also in a variety of 16- or 32-bit Data registers in the Data Register File.
Rounding or Saturating Multiplier Results
On a multiply and accumulate operation, the accumulator data can be sat-
urated and, optionally, rounded for extraction to a register or register half.
When a multiply deposits a result only in a register or register half, the sat-
uration and rounding works the same way. The rounding and saturation
operations work as follows.
• Rounding is applied only to fractional results except for the
option, which applies rounding and high half extraction to an inte-
ger result.
For the
to the accumulator (for MAC) or multiply result (for mult) and
then saturating to 32-bits.
Multiplier Results" on page 2-19.
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
or
. Each Accumulator register is divided into three sec-
A1
(bits 15:0),
A0.H/A1.H
option, the rounded result is obtained by adding 0x8000
IH
Computational Units
2-42, each multiplier has a dedicated
(bits 31:16), and
A0
For more information, see "Rounding
(bits
A0.X/A1.X
or
registers, but
A1
IH
2-37
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