Analog Devices ADSP-BF53x Blackfin Reference page 929

Table C-21. Vector Operations Instructions (Sheet 23 of 33)
Instruction
and Version
Vector Multiply and
Multiply-Accumulate
Dreg_even = (A0 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) ,
Dreg_odd = (A1 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi)
Vector Multiply and
Multiply-Accumulate
Dreg_even = (A0 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) ,
Dreg_odd = (A1 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) (FU)
Vector Multiply and
Multiply-Accumulate
Dreg_even = (A0 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) ,
Dreg_odd = (A1 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) (IS)
Vector Multiply and
Multiply-Accumulate
Dreg_even = (A0 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) ,
Dreg_odd = (A1 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) (S2RND)
Vector Multiply and
Multiply-Accumulate
Dreg_even = (A0 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) ,
Dreg_odd = (A1 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) (ISS2)
Vector Multiply and
Multiply-Accumulate
Dreg_even = (A0 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) ,
Dreg_odd = (A1 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) (M)
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Opcode
Range 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 0 0 0 0 0 0 0 0 0 0 1 1 op1
0xC00C 2000—
0xC00F FFFF Dreg
half 1 1 op0
1 1 0 0 0 0 0 0 1 0 0 0 1 1 op1
0xC08C 2000—
0xC08F FFFF Dreg
half 1 1 op0
1 1 0 0 0 0 0 1 0 0 0 0 1 1 op1
0xC10C 2000—
0xC10F FFFF Dreg
half 1 1 op0
1 1 0 0 0 0 0 0 0 0 1 0 1 1 op1
0xC02C 2000—
0xC02F FFFF Dreg
half 1 1 op0
1 1 0 0 0 0 0 1 0 0 1 0 1 1 op1
0xC12C 2000—
0xC12F FFFF Dreg
half 1 1 op0
1 1 0 0 0 0 0 0 0 0 0 1 1 1 op1
0xC01C 2000—
0xC01F FFFF Dreg
half 1 1 op0
Instruction Opcodes
Bin
Dreg Dest. src_reg_
half 0 Dreg # 0 Dreg #
Dreg Dest. src_reg_
half 0 Dreg # 0 Dreg #
Dreg Dest. src_reg_
half 0 Dreg # 0 Dreg #
Dreg Dest. src_reg_
half 0 Dreg # 0 Dreg #
Dreg Dest. src_reg_
half 0 Dreg # 0 Dreg #
Dreg Dest. src_reg_
half 0 Dreg # 0 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #
C-129