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The AAU comprises two DAGs, nine Pointer registers, four Index regis-
ters and four complete sets of related Modify, Base, and Length registers.
These registers, shown in
DAGs use to generate addresses. The types of registers are:
• Index registers,
address pointer to memory. For example, the instruction
loads the data value found at the memory location pointed to by
the register
ory accesses.
• Modify registers,
the increment or step size by which an Index register is post-modi-
fied during a register move. For example, the
instruction directs the DAG to:
– Output the address in register
– Load the contents of the memory location pointed to by
into
R0
– Modify the contents of
register
M1
• Base and Length registers,
Base and Length registers set up the range of addresses and the
starting address of a . Each
sponding I-register, for example,
on circular buffers, see
• Pointer registers,
hold an address pointer to memory. The
Pointer) and
manipulated and used in various instructions. For example, the
instruction
found at the memory location pointed to by the register
Pointer registers have no effect on circular buffer addressing. They
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Figure 5-2 on page
. Unsigned 32-bit Index registers hold an
I[3:0]
. Index registers can be used for 16- and 32-bit mem-
I0
. Signed 32-bit Modify registers provide
M[3:0]
by the value contained in the
I0
B[3:0]
,
B
"Addressing Circular Buffers" on page
,
,
P[5:0]
FP
USP
(Stack Pointer/User Stack Pointer) can be
SP/USP
loads the register
R3 = [P0]
Address Arithmetic Unit
5-4, hold the values that the
R0
I0
and
. Unsigned 32-bit
L[3:0]
pair is always coupled with a corre-
L
,
,
. For more information
I3
B3
L3
, and
. 32-bit Pointer registers
SP
P[5:0]
with the data value
R3
R3 = [I0]
=
[I0 ++ M1]
I0
5-12.
field,
(Frame
FP
. The
P0
5-3
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