Instruction Overview
In the Shift Left version, the processor performs the following sequence.
1. Left shift Accumulator
source_0
2. Left shift Accumulator
source_1
and
source_1
source_0
Table 13-3. Contents Before Shift
IF
source_1:
source_0:
Accumulator A0:
Table 13-4. A Shift Right Instruction
IF
1
source_1:
2
source_0:
3
Accumulator A0:
1 source_1 is shifted right 1 place
2 source_0 is shifted right 1 place
3 Accumulator A0 is shifted right 2 places
13-22
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
by one bit. Left shift the MSB of
A0
into the LSB of the Accumulator.
by one bit. Left shift the MSB of
A0
into the LSB of the Accumulator.
must not be the same D-register.
39............32
31............24
xxxx xxxx
yyyy yyyy
zzzz zzzz
zzzz zzzz
39............32
31............24
0xxx xxxx
0yyy yyyy
yxzz zzzz
zzzz zzzz
23............16
15..............8
xxxx xxxx
xxxx xxxx
yyyy yyyy
yyyy yyyy
zzzz zzzz
zzzz zzzz
23............16
15..............8
xxxx xxxx
xxxx xxxx
yyyy yyyy
yyyy yyyy
zzzz zzzz
zzzz zzzz
7................0
xxxx xxxx
yyyy yyyy
zzzz zzzz
7................0
xxxx xxxx
yyyy yyyy
zzzz zzzz
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