Analog Devices ADSP-BF53x Blackfin Reference page 971

Table C-23. 32-Bit Opcode Instructions (Sheet 18 of 40)
Instruction
and Version
Vector Multiply
Dreg_lo = Dreg_lo_hi * Dreg_lo_hi ,
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (T)
Multiply 16-Bit Operands
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (T, M)
Vector Multiply
Dreg_lo = Dreg_lo_hi * Dreg_lo_hi ,
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (T, M)
Multiply 16-Bit Operands
Dreg_lo = Dreg_lo_hi * Dreg_lo_hi (FU)
Multiply 16-Bit Operands
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (FU)
Vector Multiply
Dreg_lo = Dreg_lo_hi * Dreg_lo_hi ,
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (FU)
Multiply 16-Bit Operands
Dreg_even = Dreg_lo_hi * Dreg_lo_hi (FU)
Multiply 16-Bit Operands
Dreg_odd = Dreg_lo_hi * Dreg_lo_hi (FU)
Vector Multiply
Dreg_even = Dreg_lo_hi * Dreg_lo_hi ,
Dreg_odd = Dreg_lo_hi * Dreg_lo_hi (FU)
Multiply 16-Bit Operands
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (FU, M)
Vector Multiply
Dreg_lo = Dreg_lo_hi * Dreg_lo_hi ,
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (FU, M)
Multiply 16-Bit Operands
Dreg_odd = Dreg_lo_hi * Dreg_lo_hi (FU, M)
Vector Multiply
Dreg_even = Dreg_lo_hi * Dreg_lo_hi ,
Dreg_odd = Dreg_lo_hi * Dreg_lo_hi (FU, M)
Multiply 16-Bit Operands
Dreg_lo = Dreg_lo_hi * Dreg_lo_hi (TFU)
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Instruction Opcodes
Opcode
Range
0xC244 2000—
0xC244 E7FF
0xC254 0000—
0xC254 C1FF
0xC254 2000—
0xC254 E7FF
0xC280 2000—
0xC280 27FF
0xC284 0000—
0xC284 C1FF
0xC284 2000—
0xC284 E7FF
0xC288 2000—
0xC288 27FF
0xC28C 0000—
0xC28C C1FF
0xC28C 2000—
0xC28C E7FF
0xC294 0000—
0xC294 C1FF
0xC294 2000—
0xC294 E7FF
0xC29C 0000—
0xC29C C1FF
0xC29C 2000—
0xC29C E7FF
0xC2C0 2000—
0xC2C0 27FF
C-171