Analog Devices ADSP-BF53x Blackfin Reference page 637

FLUSHINV
General Form
FLUSHINV
Syntax
FLUSHINV [ Preg ] ;
FLUSHINV [ Preg ++ ] ;
Syntax Terminology
: , ,
Preg P5–0 SP
Instruction Length
In the syntax, comment (a) identifies 16-bit instruction length.
Functional Description
The Data Cache Line Invalidate instruction causes the data cache to inval-
idate a specific line in the cache. The contents of the P-register specify the
line to invalidate. If the line is in the cache and dirty, the cache line is
written out to the next level of memory in the hierarchy. If the line is not
in the cache, the instruction performs no action, like a
This instruction does not cause address exception violations. If a protec-
tion violation associated with the address occurs, the instruction acts as a
and does not cause a protection violation exception.
NOP
Options
The instruction can post-increment the line pointer by the cache line size.
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
/* indexed (a) */
/* indexed, post increment (a) */
FP
Cache Control
.
NOP
17-7