Analog Devices ADSP-BF53x Blackfin Reference page 469

Table 13-1. Input Register Bit Field Definitions
1
backgnd_reg:
2
foregnd_reg:
1 where b = background bit field (32 bits)
2 where:
–n = foreground bit field (16 bits); the L field determines the actual number of foreground bits
used.
–p = intended position of foreground bit field LSB in dest_reg (valid range 0 through 31)
–L = length of foreground bit field (valid range 0 through 16)
The operation writes the foreground bit field of length L over the back-
ground bit field with the foreground LSB located at bit p of the
background. See "Example," below, for more.
Boundary Cases
Consider the following boundary cases.
• Unsigned syntax, L = 0: The architecture copies
tents without modification into
foreground of zero length is transparent.
• Sign-extended, L = 0 and p = 0: This case loads 0x0000 0000 into
dest_reg
zero; therefore, sign-extended is all zeros.
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
31................24 23................16
bbbb bbbb bbbb bbbb
nnnn nnnn nnnn nnnn
. The sign of a zero length, zero position foreground is
Bit Operations
15..................8
bbbb bbbb
xxxp pppp
backgnd_reg
. By definition, a
dest_reg
7....................0
bbbb bbbb
xxxL LLLL
con-
13-11