Analog Devices ADSP-BF53x Blackfin Reference page 904

Video Pixel Operations Instructions
Table C-20. Video Pixel Operations Instructions (Sheet 3 of 5)
Instruction
and Version
Quad 8-Bit Average-Byte
Dreg = BYTEOP1P (Dreg_pair, Dreg_pair)
Quad 8-Bit Average-Byte
Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) (T)
Quad 8-Bit Average-Byte
Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) (R)
Quad 8-Bit Average-Byte
NOTE: When issuing compatible load/store instructions in parallel with a Quad 8-Bit Average-Byte
instruction, add 0x0800 0000 to the Quad 8-Bit Average-Byte opcode.
Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) (T, R)
Quad 8-Bit Average-Half Word
Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDL)
Quad 8-Bit Average-Half Word
Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDH)
Quad 8-Bit Average-Half Word
Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (TL)
C-104 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Opcode
Range 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0xC414 0000— 1 1 0 0 0 1 0 x x x 0 1 0 1 0 0
0xC414 0E3F
0 0 0 0 Dest.
0xC414 4000— 1 1 0 0 0 1 0 x x x 0 1 0 1 0 0
0xC414 4E3F
0 1 0 0 Dest.
0xC414 200— 1 1 0 0 0 1 0 x x x 0 1 0 1 0 0
0xC414 2E3F0
0 0 1 0 Dest.
0xC414 6000— 1 1 0 0 0 1 0 x x x 0 1 0 1 0 0
0xC414 6E3F
0 1 1 0 Dest.
0xC416 0000— 1 1 0 0 0 1 0 x x x 0 1 0 1 1 0
0xC416 0E3F
0 0 0 0 Dest.
0xC436 0000— 1 1 0 0 0 1 0 x x x 1 1 0 1 1 0
0xC436 0E3F
0 0 0 0 Dest.
0xC416 4000— 1 1 0 0 0 1 0 x x x 0 1 0 1 1 0
0xC416 6E3F
0 1 0 0 Dest.
Bin
0 0 0 Source 0
Dreg # Dreg #
0 0 0 Source 0
Dreg # Dreg #
0 0 0 Source 0
Dreg # Dreg #
0 0 0 Source 0
Dreg # Dreg #
0 0 0 Source 0
Dreg # Dreg #
0 0 0 Source 0
Dreg # Dreg #
0 0 0 Source 0
Dreg # Dreg #
Source 1
Dreg #
Source 1
Dreg #
Source 1
Dreg #
Source 1
Dreg #
Source 1
Dreg #
Source 1
Dreg #
Source 1
Dreg #