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Table C-23. 32-Bit Opcode Instructions (Sheet 40 of 40)
Instruction
and Version
Store Byte
B [ Preg + uimm15 ] = Dreg
Store Byte
B [ Preg – uimm15] = Dreg
Store Pointer Register
[ Preg + uimm17m4 ] = Preg
Store Pointer Register
[ Preg – uimm17m4 ] = Preg
Linkage
LINK uimm18m4
Linkage
UNLINK
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Instruction Opcodes
Opcode
Range
0xE680 0000—
0xE6BF 7FFF
0xE680 8000—
0xE6BF FFFF
0xE700 0000—
0xE7EF 8FFF
0xE700 8000—
0xE73F FFFF
0xE800 0000—
0xE800 FFFF
0xE801 0000
C-193
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