Analog Devices ADSP-BF53x Blackfin Reference page 553

• is set if
AV0S
• All other flags are unaffected.
The ADSP-BF535 processor has fewer
operate differently than subsequent Blackfin family products. For
more information on the ADSP-BF535 status flags, see
on page
The Pointer Register, Index Register, and Modify Register versions of the
instruction do not affect the flags.
Required Mode
User & Supervisor
Parallel Issue
The 32-bit versions of this instruction and the 16-bit versions that use
can be issued in parallel with specific other 16-bit instructions. For
Ireg
details, see "Issuing Parallel Instructions" on page
All other 16-bit versions of this instruction cannot be issued in parallel
with other instructions.
Example
a0 += a1 ;
a0 += a1 (w32) ;
p3 += p0 (brev) ;
i1 += m1 ;
i0 += m0 (brev) ;
r5 = (a0 += a1) ;
r2.l = (a0 += a1) ;
r5.h = (a0 += a1) ;
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
is set; unaffected otherwise.
AV0
A-3.
/* optional carry bit reverse mode */
Arithmetic Operations
flags and some flags
ASTAT
Table A-1
20-1.
15-41