Analog Devices ADSP-BF53x Blackfin Reference page 876

Arithmetic Operations Instructions
Table C-17. Arithmetic Operations Instructions (Sheet 22 of 44)
Instruction
and Version
Multiply and Multiply-Accumulate
to Half Register
Dreg_lo = (A0 += Dreg_lo_hi * Dreg_lo_hi) (FU)
Multiply and Multiply-Accumulate
to Half Register
Dreg_lo = (A0 += Dreg_lo_hi * Dreg_lo_hi) (IS)
Multiply and Multiply-Accumulate
to Half Register
Dreg_lo = (A0 += Dreg_lo_hi * Dreg_lo_hi) (IU)
Multiply and Multiply-Accumulate
to Half Register
Dreg_lo = (A0 += Dreg_lo_hi * Dreg_lo_hi) (T)
Multiply and Multiply-Accumulate
to Half Register
Dreg_lo = (A0 += Dreg_lo_hi * Dreg_lo_hi) (TFU)
Multiply and Multiply-Accumulate
to Half Register
Dreg_lo = (A0 += Dreg_lo_hi * Dreg_lo_hi) (S2RND)
Multiply and Multiply-Accumulate
to Half Register
Dreg_lo = (A0 += Dreg_lo_hi * Dreg_lo_hi) (ISS2)
C-76 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Opcode Range 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0xC083 2800— 1 1 0 0 0 0 0 0 1 0 0 0 0 0 1 1
0xC083 2FFF
0 0 1 0 1 Dreg
0xC103 2800— 1 1 0 0 0 0 0 1 0 0 0 0 0 0 1 1
0xC103 2FFF
0 0 1 0 1 Dreg
0xC183 2800— 1 1 0 0 0 0 0 1 1 0 0 0 0 0 1 1
0xC183 2FFF
0 0 1 0 1 Dreg
0xC043 2800— 1 1 0 0 0 0 0 0 0 1 0 0 0 0 1 1
0xC043 2FFF
0 0 1 0 1 Dreg
0xC0C3 2800— 1 1 0 0 0 0 0 0 1 1 0 0 0 0 1 1
0xC0C3 2FFF
0 0 1 0 1 Dreg
0xC023 2800— 1 1 0 0 0 0 0 0 0 0 1 0 0 0 1 1
0xC023 2FFF
0 0 1 0 1 Dreg
0xC123 2800— 1 1 0 0 0 0 0 1 0 0 1 0 0 0 1 1
0xC123 2FFF
0 0 1 0 1 Dreg
Bin
Dest. src_reg_
half Dreg # 0 Dreg #
Dest. src_reg_
half Dreg # 0 Dreg #
Dest. src_reg_
half Dreg # 0 Dreg #
Dest. src_reg_
half Dreg # 0 Dreg #
Dest. src_reg_
half Dreg # 0 Dreg #
Dest. src_reg_
half Dreg # 0 Dreg #
Dest. src_reg_
half Dreg # 0 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #