Analog Devices ADSP-BF53x Blackfin Reference page 892

Arithmetic Operations Instructions
Table C-17. Arithmetic Operations Instructions (Sheet 38 of 44)
Instruction
and Version
Multiply and Multiply-Accumulate
to Data Register
Dreg_odd = (A1 – = Dreg_lo_hi * Dreg_lo_hi) (FU)
Multiply and Multiply-Accumulate
to Data Register
Dreg_odd = (A1 – = Dreg_lo_hi * Dreg_lo_hi) (IS)
Multiply and Multiply-Accumulate
to Data Register
Dreg_odd = (A1 – = Dreg_lo_hi * Dreg_lo_hi) (S2RND)
Multiply and Multiply-Accumulate
to Data Register
Dreg_odd = (A1 – = Dreg_lo_hi * Dreg_lo_hi) (ISS2)
Multiply and Multiply-Accumulate
to Data Register
Dreg_odd = (A1 – = Dreg_lo_hi * Dreg_lo_hi) (M)
Multiply and Multiply-Accumulate
to Data Register
Dreg_odd = (A1 – = Dreg_lo_hi * Dreg_lo_hi) (FU, M)
Multiply and Multiply-Accumulate
to Data Register
Dreg_odd = (A1 – = Dreg_lo_hi * Dreg_lo_hi) (IS, M)
C-92 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Opcode Range 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0xC08A 1800— 1 1 0 0 0 0 0 0 1 0 0 0 1 0 1 0
0xC08A D9FF
Dreg
half
0xC10A 1800— 1 1 0 0 0 0 0 1 0 0 0 0 1 0 1 0
0xC10A D9FF
Dreg
half
0xC02A 1800— 1 1 0 0 0 0 0 0 0 0 1 0 1 0 1 0
0xC02A D9FF
Dreg
half
0xC12A 1800— 1 1 0 0 0 0 0 1 0 0 1 0 1 0 1 0
0xC12A D9FF
Dreg
half
0xC01A 1800— 1 1 0 0 0 0 0 0 0 0 0 1 1 0 1 0
0xC01A D9FF
Dreg
half
0xC09A 1800— 1 1 0 0 0 0 0 0 1 0 0 1 1 0 1 0
0xC09A D9FF
Dreg
half
0xC11A 1800— 1 1 0 0 0 0 0 1 0 0 0 1 1 0 1 0
0xC11A D9FF
Dreg
half
Bin
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
src_reg_ src_reg_
0 Dreg # 1 Dreg #
src_reg_ src_reg_
0 Dreg # 1 Dreg #
src_reg_ src_reg_
0 Dreg # 1 Dreg #
src_reg_ src_reg_
0 Dreg # 1 Dreg #
src_reg_ src_reg_
0 Dreg # 1 Dreg #
src_reg_ src_reg_
0 Dreg # 1 Dreg #
src_reg_ src_reg_
0 Dreg # 1 Dreg #