Vector Multiply And Multiply-Accumulate - Analog Devices ADSP-BF53x Blackfin Reference

Vector Multiply and Multiply-Accumulate

Simultaneous Issue and Execution
A pair of compatible, scalar (individual) instructions from
• "Multiply and Multiply-Accumulate to Accumulator" on
page 15-53
• "Multiply and Multiply-Accumulate to Half-Register" on
page 15-58
• "Multiply and Multiply-Accumulate to Data Register" on
page 15-67
can be combined into a single vector instruction. The vector instruction
executes the two scalar operations simultaneously and saves the results as a
vector couplet.
See the Arithmetic Operations sections listed above for the scalar instruc-
tion details.
Any MAC0 scalar instruction from the list above can be combined with a
compatible MAC1 scalar instruction under the following conditions.
• Both scalar instructions must share the same mode option (for
example, default,
optionally employ the mixed mode
MAC0.
• Both scalar instructions must share the same pair of source regis-
ters, but can reference different halves of those registers.
• If both scalar operations write to destination D-registers, they must
write to the same sized destination D-registers, either 16 or 32 bits.
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
, , ). Exception: the MAC1 instruction can
IS IU T
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Vector Operations
that does not apply to
19-41