Parallel Issue Syntax - Analog Devices ADSP-BF53x Blackfin Reference

Parallel Issue Syntax

Table 20-1. Parallel Issue Combinations
32-bit ALU/MAC instruction
Parallel Issue Syntax
The syntax of a parallel issue instruction is as follows.
•
A 32-bit ALU/MAC instruction || A 16-bit instruction
|| A 16-bit instruction ;
The vertical bar (
issued in parallel with the previous instruction. Note the terminat-
ing semicolon appears only at the end of the parallel issue
instruction.
It is possible to issue a 32-bit ALU/MAC instruction in parallel
with only one 16-bit instruction using the following syntax. The
result is still a 64-bit instruction with a 16-bit
inserted into the unused 16-bit slot.
•
A 32-bit ALU/MAC instruction || A 16-bit instruction ;
Alternately, it is also possible to issue two 16-bit instructions in
parallel with one another without an active 32-bit ALU/MAC
instruction by using the
result is still a 64-bit instruction.
•
MNOP || A 16-bit instruction || A 16-bit instruction ;
See the
page 16-25. The
included by the programmer; the software tools prepend it auto-
matically. The
16-bit instructions.
20-2 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
16-bit Instruction
) indicates the following instruction is to be
||
MNOP
(32-bit ) instruction description in
MNOP NOP
instruction does not have to be explicitly
MNOP
instruction will appear in disassembled parallel
MNOP
16-bit Instruction
NOP
instruction, shown below. Again, the
automatically
"No Op" on