Vector Pack - Analog Devices ADSP-BF53x Blackfin Reference

Instruction Overview

Vector PACK

General Form
Dest_reg = PACK ( src_half_0, src_half_1 )
Syntax
Dreg = PACK ( Dreg_lo_hi , Dreg_lo_hi ) ;
Syntax Terminology
:
Dreg R7–0
:
Dreg_lo_hi R7–0.L
Instruction Length
In the syntax, comment (b) identifies 32-bit instruction length.
Functional Description
The Vector Pack instruction packs two 16-bit half-word numbers into the
halves of a 32-bit data register as shown in
Table 19-18. Source Registers Contain
src_half_0
src_half_1
Table 19-19. Destination Register Contains
dest_reg:
19-48 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
,
R7–0.H
31................24 23................16
half_word_0
/* (b) */
Table 19-18 and Table
15..................8 7....................0
half_word_0
half_word_1
15..................8 7....................0
half_word_1
19-19.