Analog Devices ADSP-BF53x Blackfin Reference page 197

Table 4-11. Events That Cause Exceptions
Exception
Force Exception
instruction EXCPT
with 4-bit m field
Single step
Exception caused by a
trace buffer full condi-
tion
Undefined instruction 0x21
Illegal instruction
combination
Data access CPLB
protection violation
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
EXCAUSE Type:
[5:0] (E) Error
(S) Service
See note 1.
m field S
0x10 S
0x11 S
E
0x22 E
0x23 E
Program Sequencer
Notes/Examples
Instruction provides 4 bits of EXCAUSE.
When the processor is in single step mode,
every instruction generates an exception.
Primarily used for debugging.
The processor takes this exception when
the trace buffer overflows (only when
enabled by the Trace Unit Control regis-
ter).
May be used to emulate instructions that
are not defined for a particular processor
implementation.
See section for multi-issue rules in the
ADSP-BF53x/BF56x Blackfin Processor
Programming Reference.
Attempted read or write to Supervisor
resource, or illegal data memory access.
Supervisor resources are registers and
instructions that are reserved for Supervi-
sor use: Supervisor only registers, all
MMRs, and Supervisor only instructions.
(A simultaneous, dual access to two
MMRs using the data address generators
generates this type of exception.) In addi-
tion, this entry is used to signal a protec-
tion violation caused by disallowed
memory access, and it is defined by the
Memory Management Unit (MMU)
cacheability protection lookaside buffer
(CPLB).
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