Analog Devices ADSP-BF53x Blackfin Reference page 1026

Index
multiplier
arithmetic integer modes formats,
data types, 2-14
fractional modes format,
instruction effects on flags,
instruction options,
operands for input, 2-36
operations, 2-36
results, 2-37
results saturation, 2-38
results storage, 2-42
rounding, 2-37
saturation, 2-38
status, 2-24
status bits, 2-38
multiplier accumulators. See MAC
multiplier results rounding,
* (multiply) operator, 19-3
multiply, vector instruction, 19-38,
multiply 16-bit operands instruction,
15-43, C-62
multiply 32-bit operands instruction,
15-51, C-68
multiply-and-accumulate functions,
multiply and accumulate (MAC) unit. See
MAC (multiplier-accumulator)
multiply and multiply-accumulate, vector
instruction, 19-41,
multiply and multiply-accumulate to
accumulator instruction, 15-53,
multiply and multiply-accumulate to data
register instruction, 15-67,
multiply and multiply-accumulate to
half-register instruction, 15-58,
multiply without accumulate,
fractional, unsigned operand example,
2-45
unsigned integer operand example,
I-24 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
(continued)
2-16
2-16
2-38
2-40
2-19
C-115
2-17
C-121
C-69
C-86
C-74
2-44
2-45
N
=– (negate, two's-complement) operator,
19-46
negate CC instruction, 11-15,
negate instructions
negate CC, 11-15, C-42
vector negate, 19-46,
negate (two's-complement) instruction,
15-73, C-93
negative result (AN) bit,
nestable loops, registers,
nested interrupt
explained, 4-51
IPEND register, 4-40
logging, 4-55
nested interrupt handling (figure),
nested ISR
example Epilog code,
example Prolog code,
nested loops, 4-25, 7-16
nesting of events, 1-6
NIM core event, 4-30
NMI event, 1-7
NMI (nonmaskable interrupt) bit, 1-7, 3-1,
4-40, 4-41, 4-46
nonaligned memory operations,
nonmaskable interrupt (NMI). See NMI
non-nested interrupt
defined, 4-51
interrupt handling (figure),
non-OS environments,
non-processing states, 3-2
nonsequential program
operation, 4-9
structures, 4-1
no op (MNOP) instruction, parallel
instruction issues,
no op (NOP) instruction, 16-25,
NOP (16-bit no op) instruction,
NOP instruction, C-99
C-42
C-138
2-25
7-15
4-53
4-54
4-53
6-71
4-51
3-7
20-2
C-99
16-25