Instruction Overview
Vector Negate (Two's-Complement)
General Form
dest_reg = – source_reg (V)
Syntax
Dreg = – Dreg (V) ;
Syntax Terminology
:
Dreg
R7–0
Instruction Length
In the syntax, comment (b) identifies 32-bit instruction length.
Functional Description
The Vector Negate instruction returns the same magnitude with the
opposite arithmetic sign, saturated for each 16-bit half-word in the source.
The instruction calculates by subtracting the source from zero.
See
"Saturation" on page 1-17
Flags Affected
This instruction affects flags as follows.
•
is set if either or both results are zero; cleared if both are
AZ
nonzero.
•
is set if either or both results are negative; cleared if both are
AN
non-negative.
•
is set if either or both results saturate; cleared if neither saturates.
V
19-46
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
/* dual 16-bit operation (b) */
for a description of saturation behavior.
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