Analog Devices ADSP-BF53x Blackfin Reference page 421

registers from the first-in, last-out structure of the stack. Pop exactly the
same registers that were pushed onto the stack, but pop them in the oppo-
site order.
Although this instruction takes a variable amount of time to complete
depending on the number of registers to be saved, it reduces compiled
code size.
This instruction is not interruptible. Interrupts asserted after the first
issued stack read operation are appended until all the reads complete.
However, exceptions that occur while this instruction is executing cause it
to abort gracefully. For example, a load/store operation might cause a pro-
tection violation while Pop Multiple is executing. In that case,
to its original value prior to the execution of this instruction. This mea-
sure ensures that the instruction can be restarted after the exception.
Note that when a Pop Multiple operation aborts due to an exception,
some of the destination registers are changed as a result of loads that have
already completed before the exception.
The Stack Pointer must already be 32-bit aligned to use this instruction. If
an unaligned memory access occurs, an exception is generated and the
instruction aborts, as described above.
Only Pointer registers
cannot. All data registers
Flags Affected
None
Required Mode
User & Supervisor
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
can be operands for this instruction;
P5–0
can be operands for this instruction.
R7–0
Stack Control
is reset
SP
and
SP FP
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