Analog Devices ADSP-BF53x Blackfin Reference page 914

Vector Operations Instructions
Table C-21. Vector Operations Instructions (Sheet 8 of 33)
Instruction
and Version
Vector Add / Subtract
Dreg = A1 + A0, Dreg = A1 – A0 (S)
Vector Add / Subtract
Dreg = A0 + A1, Dreg = A0 – A1
Vector Add / Subtract
Dreg = A0 + A1, Dreg = A0 – A1 (S)
Vector Arithmetic Shift
Dreg = Dreg >>> uimm5 (V)
Vector Arithmetic Shift
Dreg = Dreg << uimm5 (V, S)
Vector Arithmetic Shift
Dreg = ASHIFT Dreg BY Dreg_lo (V)
Vector Arithmetic Shift
Dreg = ASHIFT Dreg BY Dreg_lo (V, S)
C-114 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Opcode
Range 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 0 0 0 1 0 x x x 0 1 0 0 0 1
0xC411 203F—
0xC411 2FC0
0 0 1 0
1 1 0 0 0 1 0 x x x 0 1 0 0 0 1
0xC411 403F—
0xC411 4FC0
0 1 0 0
1 1 0 0 0 1 0 x x x 0 1 0 0 0 1
0xC411 603F—
0xC411 6FC0
0 1 1 0
1 1 0 0 0 1 1 0 1 x x 0 0 0 0 1
0xC681 0100—
0xC681 0FFF
0 0 0 0
1 1 0 0 0 1 1 0 1 x x 0 0 0 0 1
0xC681 4000—
0xC681 4EFF
0 1 0 0
1 1 0 0 0 1 1 0 0 x x 0 0 0 0 1
0xC601 0000—
0xC601 0E3F
0 0 0 0
1 1 0 0 0 1 1 0 0 x x 0 0 0 0 1
0xC601 4000—
0xC601 4E3F
0 1 0 0
Bin
Dest 1 Dest 0
Dreg # Dreg # 1 1 1 1 1 1
Dest 1 Dest 0
Dreg # Dreg # 1 1 1 1 1 1
Dest 1 Dest 0
Dreg # Dreg # 1 1 1 1 1 1
Dest. 2's complement of
Dreg # uimm5
Dest.
Dreg # uimm5
Dest. Source 0
Dreg # x x x Dreg #
Dest. Source 0
Dreg # x x x Dreg #
Source
Dreg #
Source
Dreg #
Source 1
Dreg #
Source 1
Dreg #