Condition Code Flag - Analog Devices ADSP-BF53x Blackfin Reference

Branches
If subroutines require local, private, and temporary variables beyond the
capabilities of core registers, it is a good idea to place these variables on the
stack as well. The
of the stack memory required for this local purpose. The following exam-
ple provides two local 32-bit variables and initializes them to zero when
the routine is entered:
_sub3:
LINK 8;
[--SP] = (R7:0, P5:0);
R7 = 0 (Z);
[FP-4] = R7;
[FP-8] = R7;
...
(R7:0, P5:0) = [SP++];
UNLINK;
RTS;
_sub3.end:
For more information on the
UNLINK" on page

Condition Code Flag

The processor supports a Condition Code (
resolve the direction of a branch. This flag may be accessed eight ways:
• A conditional branch is resolved by the value in
• A Data register value may be copied into
may be copied to a Data register.
• The
BITTST
4-18 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
instruction takes a parameter that specifies the size
LINK
and
LINK
10-17.
instruction accesses the
instructions, see
UNLINK
) flag bit, which is used to
CC
CC
, and the value in
CC
flag.
CC
"LINK,
.
CC