Analog Devices ADSP-BF53x Blackfin Reference page 550

Instruction Overview
result at bit 16 (according to the RND_MOD bit in the ASTAT reg-
ister), then saturating at 32 bits and moving bits 31:16 into the
half register. (b) */
Syntax Terminology
:
Dreg R7–0
: , ,
Preg P5–0 SP
:
Ireg I3–0
:
Mreg M3–0
: optional bit reverse syntax; replace with (brev)
opt_brev
:
Dreg_lo_hi R7–0.L
Instruction Length
In the syntax, comment (a) identifies 16-bit instruction length. Comment
(b) identifies 32-bit instruction length.
Functional Description
The Modify – Increment instruction increments a register by a
user-defined quantity. In some versions, the instruction copies the result
into a third register.
The 16-bit Half-Word Data Register version increments the 40-bit
with saturation at 40 bits, then extracts the result into a half register.
A1
The extraction step involves first rounding the 40-bit result at bit 16
(according to the
bits and moving bits 31–16 into the half register.
See "Saturation" on page 1-17
15-38 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
FP
,
R7–0.H
bit in the
RND_MOD
for a description of saturation behavior.
register), then saturating at 32
ASTAT
by
A0