Table of Contents
Advertisement
Single 32-Bit Operations
In single 32-bit operations, any two 32-bit registers may be used as the
input to the ALU, considered as 32-bit operands. An addition, subtrac-
tion, or logical operation produces a 32-bit result that is deposited into an
arbitrary 32-bit destination register. ALU0 is used for this operation,
because it is the primary resource for ALU operations.
In addition to the 32-bit input operands coming from the Data Register
File, operands may be sourced and deposited into the Pointer Register
File, consisting of the eight registers
Instructions may not intermingle Pointer registers with Data
registers.
For example:
R3 = R1 + R2 (NS) ;
adds the 32-bit contents of
result in
with no saturation.
R3
R3 = R1 + R2 (S) ;
adds the 32-bit contents of
result in
with saturation.
R3
Dual 32-Bit Operations
In dual 32-bit operations, any two 32-bit registers may be used as the
input to ALU0 and ALU1, considered as a pair of 32-bit operands. An
addition or subtraction produces two 32-bit results that are deposited into
two 32-bit destination registers. Both ALU0 and ALU1 are used for this
operation. Because only two 32-bit data paths go from the Data Register
File to the arithmetic units, the same two 32-bit input registers are pre-
sented to ALU0 and ALU1.
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
P[5:0], SP, FP
to the 32-bit contents of
R2
to the 32-bit contents of
R1
Computational Units
.
and deposits the
R1
and deposits the
R2
2-29
Advertisement
Table of Contents
