Instruction Overview
Instruction Overview
This chapter discusses the instructions that manage external events. Users
can take advantage of these instructions to enable interrupts, force a spe-
cific interrupt or reset to occur, or put the processor in idle state. The
Core Synchronize instruction resolves all pending operations and flushes
the core store buffer before proceeding to the next instruction. The Sys-
tem Synchronize instruction forces all speculative, transient states in the
core and system to complete before processing continues. Other instruc-
tions in this chapter force an emulation exception, placing the processor in
Emulation mode; test the value of a specific, indirectly-addressed byte; or
increment the Program Counter (
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ADSP-BF53x/BF56x Blackfin Processor Programming Reference
) without performing useful work.
PC