Analog Devices ADSP-BF53x Blackfin Reference page 973

Table C-23. 32-Bit Opcode Instructions (Sheet 20 of 40)
Instruction
and Version
Multiply 16-Bit Operands
Dreg_lo = Dreg_lo_hi * Dreg_lo_hi (ISS2)
Multiply 16-Bit Operands
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (ISS2)
Vector Multiply
Dreg_lo = Dreg_lo_hi * Dreg_lo_hi ,
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (ISS2)
Multiply 16-Bit Operands
Dreg_even = Dreg_lo_hi * Dreg_lo_hi (ISS2)
Multiply 16-Bit Operands
Dreg_odd = Dreg_lo_hi * Dreg_lo_hi (ISS2)
Vector Multiply
Dreg_even = Dreg_lo_hi * Dreg_lo_hi ,
Dreg_odd = Dreg_lo_hi * Dreg_lo_hi (ISS2)
Multiply 16-Bit Operands
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (ISS2, M)
Vector Multiply
Dreg_lo = Dreg_lo_hi * Dreg_lo_hi ,
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (ISS2, M)
Multiply 16-Bit Operands
Dreg_odd = Dreg_lo_hi * Dreg_lo_hi (ISS2, M)
Vector Multiply
Dreg_even = Dreg_lo_hi * Dreg_lo_hi ,
Dreg_odd = Dreg_lo_hi * Dreg_lo_hi (ISS2, M)
Multiply 16-Bit Operands
Dreg_lo = Dreg_lo_hi * Dreg_lo_hi (IH)
Multiply 16-Bit Operands
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (IH)
Vector Multiply
Dreg_lo = Dreg_lo_hi * Dreg_lo_hi ,
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (IH)
Multiply 16-Bit Operands
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (IH, M)
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Instruction Opcodes
Opcode
Range
0xC320 2000—
0xC320 27FF
0xC324 0000—
0xC324 C1FF
0xC324 2000—
0xC324 E7FF
0xC328 2000—
0xC328 27FF
0xC32C 0000—
0xC32C C1FF
0xC32C 2000—
0xC32C E7FF
0xC334 0000—
0xC334 C1FF
0xC334 2000—
0xC334 E7FF
0xC33C 0000—
0xC33C C1FF
0xC33C 2000—
0xC33C E7FF
0xC360 2000—
0xC360 27FF
0xC364 0000—
0xC364 C1FF
0xC364 2000—
0xC364 E7FF
0xC374 0000—
0xC374 C1FF
C-173