Analog Devices ADSP-BF53x Blackfin Reference page 740

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Instruction Overview
Flags Affected
None
The ADSP-BF535 processor has fewer
operate differently than subsequent Blackfin family products. For
more information on the ADSP-BF535 status flags, see
on page
Required Mode
User & Supervisor
Parallel Issue
This instruction can be issued in parallel with the combination of one
16-bit length load instruction to the
other instructions can be issued in parallel with the Vector Search instruc-
tion. Note the following legal and illegal forms.
(r1, r0) = search r2 (LT) || r2 = [p0++p3]; /* ILLEGAL */
(r1, r0) = search r2 (LT) || r2 = [p0++]; /* LEGAL */
(r1, r0) = search r2 (LT) || r2 = [p0+]; /* LEGAL */
Example
/* Initialize Accumulators with appropriate value for the type of
search. */
r0.l=0x7fff ;
r0.h=0 ;
a0=r0 ;
a1=r0 ;
/* Initialize R2. */
r2=[p0++] ;
/* Assume P1 is initialized to the size of the vector length. */
19-52
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
A-3.
/* max positive 16-bit value */
/* max positive 16-bit value */
flags and some flags
ASTAT
register and one 16-bit
P0
Table A-1
. No
NOP

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