Multiply 32-Bit Operands - Analog Devices ADSP-BF53x Blackfin Reference

Multiply 32-Bit Operands

General Form
dest_reg *= multiplier_register
Syntax
Dreg *= Dreg ; /* 32 x 32 integer multiply (a) */
Syntax Terminology
:
Dreg R7–0
Instruction Length
In the syntax, comment (a) identifies 16-bit instruction length.
Functional Description
The Multiply 32-Bit Operands instruction multiplies two 32-bit data reg-
isters (
dest_reg
. The instruction mimics multiplication in the C language and
dest_reg
effectively performs
integer multiply is modulo 2
and overflows are possible but not detected. The overflow flag in the
register is never set.
ASTAT
Users are required to limit input numbers to ensure that the resulting
product does not exceed the 32-bit
cation is required, users should write their own multiplication macro with
that capability.
Accumulators
The Multiply 32-Bit Operands instruction does not implicitly modify the
number in
multiplier_register
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
and
multiplier_register)
Dreg1 = (Dreg1 * Dreg2)
32
, the result always fits in a 32-bit
and are unchanged by this instruction.
A0 A1
Arithmetic Operations
and saves the product in
modulo 2
capacity. If overflow notifi-
dest_reg
.
32
. Since the
,
dest_reg
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