Analog Devices ADSP-BF53x Blackfin Reference page 797

Table B-3. Interrupt Controller Registers (Cont'd)
Memory-mapped
Address
0xFFE0 2034
0xFFE0 2038
0xFFE0 203C
0xFFE0 2104
0xFFE0 2108
0xFFE0 210C
0xFFE0 2110
Debug, MP, and Emulation Unit Registers
Debug, MP, and Emulation Unit registers (0xFFE0 5000 –
0xFFE0 5008)
Table B-4. Debug and Emulation Unit Registers
Memory-mapped
Address
0xFFE0 5000
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Register Name
EVT13
(IVG13)
EVT14
(IVG14)
EVT15
(IVG15)
IMASK
IPEND
ILAT
IPRIO
Register Name See Section
DSPID "DSPID Register" on page 21-27
Core MMR Assignments
See Section
"Core Event Vector Table" on page 4-42
"Core Event Vector Table" on page 4-42
"Core Event Vector Table" on page 4-42
"IMASK Register" on page 4-38
"IPEND Register" on page 4-40
"ILAT Register" on page 4-39
"IPRIO Register and Write Buffer Depth"
on page 6-35
B-7