Vector Multiply - Analog Devices ADSP-BF53x Blackfin Reference

Instruction Overview

Vector Multiply

Simultaneous Issue and Execution
A pair of compatible, scalar (individual) Multiply 16-Bit Operands
instructions from
bined into a single Vector Multiply instruction. The vector instruction
executes the two scalar operations simultaneously and saves the results as a
vector couplet.
See the Arithmetic Operations
page 15-43 for the scalar instruction details.
Any MAC0 scalar Multiply 16-Bit Operands instruction can be combined
with a compatible MAC1 scalar Multiply 16-Bit Operands instruction
under the following conditions.
• Both scalar instructions must share the same mode option (for
example, default,
optionally employ the mixed mode
MAC0.
• Both scalar instructions must share the same pair of source regis-
ters, but can reference different halves of those registers.
• Both scalar operations (if they are writes) must write to the same
sized destination registers, either 16 or 32 bits.
• The destination registers for both scalar operations must form a
vector couplet, as described below.
• 16-bit: store results in the upper- and lower-halves of the
same 32-bit
MAC1 writes to the upper half.
• 32-bit: store results in valid
pair's lower (even-numbered)
upper (odd-numbered)
19-38 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
"Multiply 16-Bit Operands" on page 15-43
"Multiply 16-Bit Operands" on
, , ). Exception: the MAC1 instruction can
IS IU T
. MAC0 writes to the lower half and
Dreg
that does not apply to
(M)
pairs. MAC0 writes to the
Dreg
and MAC1 writes to the
Dreg
.
Dreg
can be com-