Analog Devices ADSP-BF53x Blackfin Reference page 910

Vector Operations Instructions
Table C-21. Vector Operations Instructions (Sheet 4 of 33)
Instruction
and Version
Vector Add / Subtract
Dreg = Dreg –|– Dreg (SC0)
Vector Add / Subtract
Dreg = Dreg +|+ Dreg, Dreg = Dreg –|– Dreg
Vector Add / Subtract
Dreg = Dreg +|+ Dreg, Dreg = Dreg –|– Dreg (ASR)
Vector Add / Subtract
Dreg = Dreg +|+ Dreg, Dreg = Dreg –|– Dreg (ASL)
Vector Add / Subtract
Dreg = Dreg +|+ Dreg, Dreg = Dreg –|– Dreg (S)
Vector Add / Subtract
Dreg = Dreg +|+ Dreg, Dreg = Dreg –|– Dreg (S, ASR)
Vector Add / Subtract
Dreg = Dreg +|+ Dreg, Dreg = Dreg –|– Dreg (S, ASL)
C-110 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Opcode
Range 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 0 0 0 1 0 x x x 0 0 0 0 0 0
0xC400 F000—
0xC400 FE3F
1 1 1 1
1 1 0 0 0 1 0 x x x 0 0 0 0 0 1
0xC401 0000—
0xC401 0FFF
0 0 0 0
1 1 0 0 0 1 0 x x x 0 0 0 0 0 1
0xC401 8000—
0xC401 8FFF
1 0 0 0
1 1 0 0 0 1 0 x x x 0 0 0 0 0 1
0xC401 C000—
0xC401 CFFF
1 1 0 0
1 1 0 0 0 1 0 x x x 0 0 0 0 0 1
0xC401 2000—
0xC401 2FFF
0 0 1 0
1 1 0 0 0 1 0 x x x 0 0 0 0 0 1
0xC401 A000—
0xC401 AFFF
1 0 1 0
1 1 0 0 0 1 0 x x x 0 0 0 0 0 1
0xC401 E000—
0xC401 EFFF
1 1 1 0
Bin
Dest Source 0
Dreg # 0 0 0 Dreg #
Dest 1 Dest 0 Source 0
Dreg # Dreg # Dreg #
Dest 1 Dest 0 Source 0
Dreg # Dreg # Dreg #
Dest 1 Dest 0 Source 0
Dreg # Dreg # Dreg #
Dest 1 Dest 0 Source 0
Dreg # Dreg # Dreg #
Dest 1 Dest 0 Source 0
Dreg # Dreg # Dreg #
Dest 1 Dest 0 Source 0
Dreg # Dreg # Dreg #
Source 1
Dreg #
Source 1
Dreg #
Source 1
Dreg #
Source 1
Dreg #
Source 1
Dreg #
Source 1
Dreg #
Source 1
Dreg #