Analog Devices ADSP-BF53x Blackfin Reference page 717

Logical shifts discard any bits shifted out of the register and backfill
vacated bits with zeros.
">>" AND "<<" Syntax
The two half-word registers in
places specified by
The data is always a pair of 16-bit half-registers. Valid
values are 0 through 15.
"LSHIFT" Syntax
Both half-word registers in
prescribed in
shift_magnitude
For the
LSHIFT
direction of the shift.
• Positive shift magnitudes produce left shifts.
• Negative shift magnitudes produce right shifts.
The
dest_reg
Valid shift magnitudes for 16-bit
included. If a number larger than these is supplied, the instruction masks
and ignores the more significant bits.
This instruction does not implicitly modify the
ally,
dest_reg
D-register for the
register at your discretion.
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
dest_reg
shift_magnitude
src_reg
, and the result is stored into
versions, the sign of the shift magnitude determines the
and are both pairs of 16-bit half-registers.
src_reg
can be the same D-register as
and the
dest_reg
Vector Operations
are shifted by the number of
and the result stored into
are shifted by the number of places
are –16 through +15, zero
src_reg
src_reg
src_reg
explicitly modifies the source
src_reg
dest_reg
shift_magnitude
.
dest_reg
values. Option-
. Using the same
19-29
.