Analog Devices ADSP-BF53x Blackfin Reference page 796

Interrupt Controller Registers
Interrupt Controller Registers
Interrupt Controller registers (0xFFE0 2000 – 0xFFE0 2110)
Table B-3. Interrupt Controller Registers
Memory-mapped
Address
0xFFE0 2000
0xFFE0 2004
0xFFE0 2008
0xFFE0 200C
0xFFE0 2010
0xFFE0 2014
0xFFE0 2018
0xFFE0 201C
0xFFE0 2020
0xFFE0 2024
0xFFE0 2028
0xFFE0 202C
0xFFE0 2030
B-6 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Register Name
EVT0
(EMU)
EVT1
(RST)
EVT2
(NMI)
EVT3
(EVX)
EVT4
EVT5
(IVHW)
EVT6
(TMR)
EVT7
(IVG7)
EVT8
(IVG8)
EVT9
(IVG9)
EVT10
(IVG10)
EVT11
(IVG11)
EVT12
(IVG12)
See Section
"Core Event Vector Table" on page 4-42
"Core Event Vector Table" on page 4-42
"Core Event Vector Table" on page 4-42
"Core Event Vector Table" on page 4-42
"Core Event Vector Table" on page 4-42
"Core Event Vector Table" on page 4-42
"Core Event Vector Table" on page 4-42
"Core Event Vector Table" on page 4-42
"Core Event Vector Table" on page 4-42
"Core Event Vector Table" on page 4-42
"Core Event Vector Table" on page 4-42
"Core Event Vector Table" on page 4-42
"Core Event Vector Table" on page 4-42