Analog Devices ADSP-BF53x Blackfin Reference page 982

Instructions Listed By Operation Code
Table C-23. 32-Bit Opcode Instructions (Sheet 29 of 40)
Instruction
and Version
Vector Add / Subtract
Dreg = Dreg +|– Dreg, Dreg = Dreg –|+ Dreg (SCO)
Vector Add / Subtract
Dreg = Dreg +|– Dreg, Dreg = Dreg –|+ Dreg (ASR)
Vector Add / Subtract
Dreg = Dreg +|– Dreg, Dreg = Dreg –|+ Dreg (CO, ASR)
Vector Add / Subtract
Dreg = Dreg +|– Dreg, Dreg = Dreg –|+ Dreg (S, ASR)
Vector Add / Subtract
Dreg = Dreg +|– Dreg, Dreg = Dreg –|+ Dreg (SCO, ASR)
Vector Add / Subtract
Dreg = Dreg +|– Dreg, Dreg = Dreg –|+ Dreg (ASL)
Vector Add / Subtract
Dreg = Dreg +|– Dreg, Dreg = Dreg –|+ Dreg (CO, ASL)
Vector Add / Subtract
Dreg = Dreg +|– Dreg, Dreg = Dreg –|+ Dreg (S, ASL)
Vector Add / Subtract
Dreg = Dreg +|– Dreg, Dreg = Dreg –|+ Dreg (SCO, ASL)
Add
Dreg_hi = Dreg_lo + Dreg_lo (NS)
Add
Dreg_hi = Dreg_lo + Dreg_lo (S)
Add
Dreg_hi = Dreg_lo + Dreg_hi (NS)
Add
Dreg_hi = Dreg_lo + Dreg_hi (S)
Add
Dreg_hi = Dreg_hi + Dreg_lo (NS)
Add
Dreg_hi = Dreg_hi + Dreg_lo (S)
Add
Dreg_hi = Dreg_hi + Dreg_hi (NS)
C-182 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Opcode
Range
0xC421 3000—
0xC421 3FFF
0xC421 8000—
0xC421 8FFF
0xC421 9000—
0xC421 9FFF
0xC421 A000—
0xC421 AFFF
0xC421 B000—
0xC421 BFFF
0xC421 C000—
0xC421 CFFF
0xC421 D000—
0xC421 DFFF
0xC421 E000—
0xC421 EFFF
0xC421 F000—
0xC421 FFFF
0xC422 0000—
0xC422 0E3F
0xC422 2000—
0xC422 2E3F
0xC422 4000—
0xC422 4E3F
0xC422 6000—
0xC422 6E3F
0xC422 8000—
0xC422 8E3F
0xC422 A000—
0xC422 AE3F
0xC422 C000—
0xC422 CE3F