Store Low Data Register Half - Analog Devices ADSP-BF53x Blackfin Reference

Store Low Data Register Half

General Form
W [ indirect_address ] = Dreg_lo
W [ indirect_address ] = D-register
Syntax
W [ Ireg ] = Dreg_lo ;
W [ Ireg ++ ] = Dreg_lo ;
addressing (a) */
W [ Ireg -- ] = Dreg_lo ;
addressing (a) */
W [ Preg ] = Dreg_lo ;
W [ Preg ] = Dreg ;
W [ Preg ++ ] = Dreg ;
W [ Preg -- ] = Dreg ;
W [ Preg + uimm5m2 ] = Dreg ;
*/
W [ Preg + uimm16m2 ] = Dreg ;
*/
W [ Preg - uimm16m2 ] = Dreg ;
*/
W [ Preg ++ Preg ] = Dreg_lo ;
1
index (a) */
Syntax Terminology
:
Dreg_lo R7–0.L
: , ,
Preg P5–0 SP
:
Ireg I3–0
1
See "Indirect and Post-Increment Index Addressing" on page
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
/* indirect data addressing (a)*/
/* indirect, post-increment data
/* indirect, post-decrement data
/* indirect (a)*/
/* indirect (a)*/
/* indirect, post-increment (a)*/
/* indirect, post-decrement (a)*/
FP
/* indexed with small offset (a)
/* indexed with large offset (b)
/* indexed with large offset (b)
/* indirect, post-increment
8-51.
Load / Store
8-49