Endianess - Analog Devices ADSP-BF53x Blackfin Reference

Table 2-2. Data Formats
Format Representation in Memory
32.0 Unsigned dddd dddd dddd dddd dddd
Word dddd dddd dddd
32.0 Signed sddd dddd dddd dddd dddd
Word dddd dddd dddd
16.0 Unsigned dddd dddd dddd dddd
Half Word
16.0 Signed sddd dddd dddd dddd
Half Word
8.0 Unsigned dddd dddd
Byte
8.0 Signed sddd dddd
Byte
1.15 Signed s.ddd dddd dddd dddd
Fraction
1.31 Signed s.ddd dddd dddd dddd dddd
Fraction dddd dddd dddd
Packed 8.0 dddd dddd dddd dddd dddd
Unsigned Byte dddd dddd dddd
Packed 1.15 s.ddd dddd dddd dddd s.ddd
Signed dddd dddd dddd
Fraction

Endianess

Both internal and external memory are accessed in little endian byte order.
For more information, see
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Representation in 32-bit Register
dddd dddd dddd dddd dddd dddd dddd
dddd
sddd dddd dddd dddd dddd dddd dddd
dddd
0000 0000 0000 0000 dddd dddd dddd
dddd
ssss ssss ssss ssss sddd dddd dddd dddd
0000 0000 0000 0000 0000 0000 dddd
dddd
ssss ssss ssss ssss ssss ssss sddd dddd
ssss ssss ssss ssss s.ddd dddd dddd dddd
s.ddd dddd dddd dddd dddd dddd dddd
dddd
dddd dddd dddd dddd dddd dddd dddd dddd
s.ddd dddd dddd dddd s.ddd dddd dddd
dddd
"Memory Transaction Model" on page
Computational Units
6-65.
2-13