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Instruction Overview
Of course, the usual intent for Pop and these specific Load Register
instructions is to recover register values that were previously pushed onto
the stack. The user must exercise programming discipline to restore the
stack values back to their intended registers from the first-in, last-out
structure of the stack. Pop or load exactly the same registers that were
pushed onto the stack, but pop them in the opposite order.
The Stack Pointer must already be 32-bit aligned to use this instruction. If
an unaligned memory access occurs, an exception is generated and the
instruction aborts.
A value cannot be popped off the stack directly into the Stack Pointer.
SP = [SP ++]
page 1-13
for more information.
Flags Affected
The
ASTAT = [SP++]
metic flags.
Flags are not affected by other versions of this instruction.
Required Mode
User & Supervisor for most cases
Explicit access to
requires Supervisor mode. A protection violation exception results if any
of these registers are explicitly accessed from User mode.
Parallel Issue
The 16-bit versions of the Load Data Register and Load Pointer Register
instructions can be issued in parallel with specific other instructions. For
details, see
"Issuing Parallel Instructions" on page
The Pop instruction cannot be issued in parallel with other instructions.
10-10
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
is an invalid instruction. Refer to
version of this instruction explicitly affects arith-
,
,
USP
SEQSTAT
SYSCFG
"Register Names" on
,
,
,
, and
RETI
RETX
RETN
20-1.
RETE
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