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ASTAT Register
Figure 2-9
describes the Arithmetic Status (
updates the status bits in
ALU, multiplier, or shifter operation.
Arithmetic Status Register (ASTAT)
VS (Sticky Dreg Overflow)
Sticky version of V
V (Dreg Overflow)
0 - Last result written from
ALU to Data Register File
register has not overflowed
1 - Last result has overflowed
AV1S (Sticky A1 Overflow)
Sticky version of AV1
AC1 (ALU1 Carry)
0 - Operation in ALU1 does not
generate a carry
1 - Operation generates a carry
AC0 (ALU0 Carry)
0 - Operation in ALU0 does not
generate a carry
1 - Operation generates a
carry
RND_MOD (Rounding Mode)
0 - Unbiased rounding
1 - Biased rounding
AQ (Quotient)
Quotient bit
Figure 2-9. Arithmetic Status Register
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
, indicating the status of the most recent
ASTAT
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
0
0
0
0
0
0
15 14 13 12 11 10
9
8
0
0
0
0
0
0
0
0
Computational Units
) register. The processor
ASTAT
0
0
0
0
0
0
0
0
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
Reset = 0x0000 0000
AV0 (A0 Overflow)
0 - Last result written to A0
has not overflowed
1 - Last result written to A0
has overflowed
AV0S (Sticky A0 Overflow)
Sticky version of AV0
AV1 (A1 Overflow)
0 - Last result written to A1
has not overflowed
1 - Last result written to A1
has overflowed
0
0
AZ (Zero Result)
0 - Result from last ALU0,
ALU1, or shifter operation
is not zero
1 - Result is zero
AN (Negative Result)
0 - Result from last ALU0,
ALU1, or shifter operation
is not negative
1 - Result is negative
AC0_COPY
Identical to bit 12
V_COPY
Identical to bit 24
CC (Condition Code)
Multipurpose flag, used
primarily to hold resolution of
arithmetic comparisons. Also
used by some shifter instruc-
tions to hold rotating bits.
2-25
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