Analog Devices ADSP-BF53x Blackfin Reference page 455

The second instruction in this class performs a bit-wise XOR of
cally AND'ed with the
bit of the destination register and into the
not modified by this operation. This operation is illustrated in
Figure 12-3.
The upper 15 bits of
after the operation.
XOR Reduction
0
A0[39]
After Operation
dr[15]
Figure 12-3. XOR of A0, Logical AND with the D-Register
Modified Type I LFSR (with feedback)
Two instructions support the LFSR with feedback.
A0 = BXORSHIFT(A0, A1, CC)
Dreg_lo = CC = BXOR(A0, A1, CC)
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
. The output is placed into the least significant
dreg
are overwritten with zero, and dr[0] = IN
dreg_lo
+
D[31]
A0[31]
dr[14] dr[13]
dreg_lo[15:0]
Logical Operations
bit. The Accumulator
CC
+ + +
IN
D[2] D[1] D[0]
A0[0]
A0[2] A0[1]
IN
logi-
A0
is
A0
CC dreg_lo
12-13