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Instruction Overview
to invalidate a buffer, but the instruction also performs a flush of data
marked as "dirty." The
the
"Memory"
cache. Buffers in source memory need to be invalidated when a DMA
channel is filling the buffer and data cache has been enabled and the
source memory has been defined as cacheable. By invalidating the
cache-lines associated with the buffer, "coherency" is maintained between
the contents stored in cache and the actual values in source memory.
When the buffer size is less than or equal in size to the actual cache on the
processor, it is better to use the
date the cache-lines. When the buffer is larger in size than the cache, it is
better to use the
invalidate the cache-lines.
The
instruction is used to invalidate an instruction cache-line.
IFLUSH
On the Blackfin processors, the cache-line size is 32 bytes.
17-2
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
and
ITEST
chapter, can also be used to directly invalidate a line in
FLUSHINV
registers described in the
DTEST
registers, which are described in
DTEST
instruction in a loop to invali-
"Memory"
chapter to
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