Analog Devices ADSP-BF53x Blackfin Reference page 187

Figure 4-9 illustrates that by pushing
be re-enabled during an interrupt service routine, resulting in a short
duration where interrupts are globally disabled.
CYCLE: 1 2
IF 1
A9 A10
IF 2
A8 A9 A1 0
IF 3 A7 A8 A9
A6 A8
DEC A7
A5 A6 A7
AC
DF1 A4 A5 A6
DF2
A3 A4 A5
EX1
A2 A4
A3
EX2 A1 A2 A3
A0 A1 A2
WB
CYCLE 1: INTERRUPT IS LATCHED. ALL POSSIBLE INTERRUPT SOURCES DETERMINED.
CYCLE 2: INTERRUPT IS PRIORITIZED.
CYCLE 3: ALL INSTRUCTIONS ABOVE A2 ARE KILLED. A2 IS KILLED IF IT IS AN RTI OR CLI INSTRUCTION. ISR STARTING
ADDRESS LOOKUP OCCURS.
CYCLE 4: I0 (INSTRUCTION AT START OF ISR) ENTERS PIPELINE. ASSUME IT IS A PUSH RETI INSTRUCTION (TO ENABLE NESTING).
CYCLE 10: WHEN PUSH REACHES DF2 STAGE, INTERRUPTS ARE RE-ENABLED.
CYCLE M+1: WHEN THE POP RETI INSTRUCTION REACHES THE DF2 STAGE, INTERRUPTS ARE DISABLED.
CYCLE M+5: WHEN RTI REACHES THE WB STAGE, INTERRUPTS ARE RE-ENABLED.
Figure 4-9. Nested Interrupt Handling
Example Prolog Code for Nested Interrupt Service Routine
Listing 4-3. Prolog Code for Nested ISR
/* Prolog code for nested interrupt service routine.
Push return address in RETI into Supervisor stack, ensuring that
interrupts are back on. Until now, interrupts have been
suspended.*/
ISR:
[--SP] = RETI ; /* Enables interrupts and saves return address to
stack */
[--SP] = ASTAT ;
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
INTERRUPTS DISABLED
DURING THIS INTERVAL.
3 4 5 6 7
PUSH I1 I2
I3
PUSH I1 I2
PUSH I1
PUSH
Program Sequencer
onto the stack, interrupts can
RETI
8 9 10 m
I6 . . .
I4
I5
. . .
I3 I4 I5
. . .
I4
I2 I3
. . .
I2 I3
I1
PUSH I2 . . . RT I
I1
. . .
PUSH I1 POP
PUSH . . . I n
I
. . .
n-1
I
. . . n-2
. . . I n-3
INTERRUPTS DISABLED
DURING THIS INTERVAL.
m+1 m+2 m+3 m+4 m+5
A4 A5 A6 A7
A3
A3 A4 A5 A6
A3 A4 A5
A3 A4
A3
RTI
RTI
POP
I n
RTI
POP
I I n
RTI
n-1 POP
I n-2 I n
I n-1
RTI
POP
4-53