Conditional Register Move; Branch Prediction - Analog Devices ADSP-BF53x Blackfin Reference

Branches
PC-relative offset is an 11-bit immediate value that must be a multiple of
two (bit 0 must be a 0). This gives an effective dynamic range of –1024 to
+1022 bytes.
For example, the following instruction tests the
tive, jumps to a location identified by the label
IF CC JUMP dest_address ;
Take care when conditional branches are followed by load opera-
tions. For more information, see "Load/Store Operation" on
page 6-66.

Conditional Register Move

Register moves can be performed depending on whether the value of the
flag is true or false (1 or 0). In some cases, using this instruction instead
CC
of a branch eliminates the cycles lost because of the branch. These condi-
tional moves can be done between any R- or P-registers (including
).
FP
Example code:
IF CC R0 = P0 ;

Branch Prediction

The sequencer supports static branch prediction to accelerate execution of
conditional branches. These branches are executed based on the state of
the bit.
CC
In the EX2 stage, the sequencer compares the actual
predicted value. If the value was mispredicted, the branch is corrected, and
the correct address is available for the WB stage of the pipeline.
4-20 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
flag and, if it is posi-
CC
:
dest_address
bit value to the
CC
and
SP