Analog Devices ADSP-BF53x Blackfin Reference page 501

Data Shift, Registered Shift Magnitude
Dreg >>= Dreg ;
Dreg <<= Dreg ;
Dreg_lo_hi = LSHIFT Dreg_lo_hi BY Dreg_lo ;
Dreg = LSHIFT Dreg BY Dreg_lo ;
A0 = LSHIFT A0 BY Dreg_lo ;
A1 = LSHIFT A1 BY Dreg_lo ;
Syntax Terminology
:
Dreg R7–0
:
Dreg_lo R7–0.L
:
Dreg_lo_hi R7–0.L
:
Preg P5–0
: 4-bit unsigned field, with a range of 0 through 15
uimm4
: 5-bit unsigned field, with a range of 0 through 31
uimm5
Instruction Length
In the syntax, comment (a) identifies 16-bit instruction length. Comment
(b) identifies 32-bit instruction length.
Functional Description
The Logical Shift instruction logically shifts a register by a specified dis-
tance and direction.
Logical shifts discard any bits shifted out of the register and backfill
vacated bits with zeros.
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
/* right shift (a) */
/* left shift (a) */
/* (b) */
/* (b) */
,
R7–0.H
Shift/Rotate Operations
/* (b) */
/* (b) */
14-15